Electronics & Communications Custom Compiler IC Design

TECHSIM 2025🔬

"Custom Compiler Simulation & Design Challenge"

TECHSIM 2025 is a one-day technical workshop and design competition organized by the Department of ECE, CHRIST (Deemed to be University), in collaboration with C2S, MeitY, CDAC, and CHIPIN. The event provides hands-on exposure to the Synopsys Custom Compiler, enabling participants to explore the fundamentals of analog and digital IC design and simulation.

Team Size: 1/2 Members Registration Fee: ₹500 ← Back to Events
TECHSIM Event

Event Details

Date: November 27th, 2025

Venue: Department of ECE, CHRIST (Deemed to be University), Kengeri Campus

Organized by: Department of Electronics and Communication Engineering, CHRIST (Deemed to be University), Kengeri Campus, Bengaluru – 560074

In Association With: C2S (Chips to Startup Programme) | Ministry of Electronics and Information Technology (MeitY) | CDAC | CHIPIN

Event Schedule

Morning Session

10:00 AM – 12:30 PM

Workshop on Synopsys Custom Compiler - Introduction to environment, fundamentals of analog and digital IC design, hands-on guided session

Lunch Break

12:30 PM – 1:30 PM

Break for lunch and networking

Afternoon Competition

1:30 PM – 4:00 PM

Custom Compiler Design Competition - Apply learned concepts to solve real-time circuit design challenge

Prize Money

Total Prize Pool
₹22,000

Workshop Highlights

Introduction to Synopsys Custom Compiler environment
Fundamentals of analog and digital IC design
Hands-on guided session on creating, analyzing, and testing circuits
Applying fundamentals in a design challenge

Rules & Regulations

Team Size: Maximum 2 members per team
Participants may register individually (team allocation on event day) or as a pre-formed group
Limited to 60 participants (30 teams)
Attendance in the workshop is mandatory to qualify for the competition
Systems and software access will be provided during the event
External design files or pre-made projects are not permitted
The judges' decisions are final and binding
Certificates will be awarded to all participants
Each institution can have a maximum of two registrations as contingents for every event

Registration Details

Registration Fees(1/2 members): ₹500

Limited Seats: 60 participants only

Registration: First-come, first-served basis

Who Can Participate

Open to all engineering students (B.Tech / M.Tech / Ph.D.) across institutions
Beginner-friendly — no prior experience in Synopsys Custom Compiler is required

Highlights

Hands-on experience with Synopsys Custom Compiler
Practical exposure to analog/digital IC design and simulation
Participation and Winner Certificates
Mentorship from faculty experts and industry collaborators
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Complimentary Access

Magnovite Special Workshops – Nov 28, 2025

ELEVATE YOUR VICTORY: Winners of this Magnovite Departmental Event secure their complimentary access to the highly anticipated Magnovite Special Workshops, conducted by the respective departments on November 28, 2025. This achievement grants you a full-value registration waiver, providing admission to these premier technical sessions—an opportunity valued at ₹500 per participant—as recognition of your competitive excellence.